89a9212700
Key changes: - Phase 83-1: Switch dispatch fixed mode (tiny_inline_slots_switch_dispatch_fixed_box) - NO-GO (marginal +0.32%, branch reduction negligible) Reason: lazy-init pattern already optimal, Phase 78-1 pattern shows diminishing returns - Allocator comparison baseline update (10-run SSOT, WS=400, ITERS=20M): tcmalloc: 115.26M (92.33% of mimalloc) jemalloc: 97.39M (77.96% of mimalloc) system: 85.20M (68.24% of mimalloc) mimalloc: 124.82M (baseline) - hakmem PROFILE correction: scripts/run_mixed_10_cleanenv.sh + run_allocator_quick_matrix.sh PROFILE explicitly set to MIXED_TINYV3_C7_SAFE for hakmem measurements Result: baseline stabilized to 55.53M (44.46% of mimalloc) Previous unstable measurement (35.57M) was due to profile leak - Documentation: * PERFORMANCE_TARGETS_SCORECARD.md: Reference allocators + M1/M2 milestone status * PHASE83_1_SWITCH_DISPATCH_FIXED_RESULTS.md: Phase 83-1 analysis (NO-GO) * ALLOCATOR_COMPARISON_QUICK_RUNBOOK.md: Quick comparison procedure * ALLOCATOR_COMPARISON_SSOT.md: Detailed SSOT methodology - M2 milestone status: 44.46% (target 55%, gap -10.54pp) - structural improvements needed 🤖 Generated with Claude Code Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com>
250 lines
9.2 KiB
Markdown
250 lines
9.2 KiB
Markdown
# Phase 76-2: C4+C5+C6 Comprehensive 4-Point Matrix Results
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## Executive Summary
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**Decision**: **STRONG GO** (+7.05% cumulative gain, exceeds +3.0% threshold with super-additivity)
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**Key Finding**: C4+C5+C6 inline slots deliver **+7.05% throughput gain** on Standard binary, completing the per-class optimization trilogy with synergistic interaction effects.
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**Critical Discovery**: C4 shows **negative performance in isolation** (-0.08% without C5/C6) but **synergistic gain with C5+C6 present** (+1.27% marginal contribution in full stack).
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---
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## 4-Point Matrix Test Results
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### Test Configuration
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- **Workload**: Mixed SSOT (WS=400, ITERS=20000000)
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- **Binary**: `./bench_random_mixed_hakmem` (Standard build)
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- **Runs**: 10 per configuration
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- **Harness**: `scripts/run_mixed_10_cleanenv.sh`
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### Raw Data (10 runs per point)
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| Point | Config | Average Throughput | Delta vs A | Status |
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|-------|--------|-------------------|------------|--------|
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| **A** | C4=0, C5=0, C6=0 | **49.48 M ops/s** | - | Baseline |
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| **B** | C4=1, C5=0, C6=0 | 49.44 M ops/s | **-0.08%** | Regression |
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| **C** | C4=0, C5=1, C6=1 | 52.27 M ops/s | **+5.63%** | Strong gain |
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| **D** | C4=1, C5=1, C6=1 | 52.97 M ops/s | **+7.05%** | Excellent gain |
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### Per-Point Details
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**Point A (All OFF)**: 48804232, 49822782, 50299414, 49431043, 48346953, 50594873, 49295433, 48956687, 49491449, 49803811
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- Mean: 49.48 M ops/s
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- σ: 0.63 M ops/s
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**Point B (C4 Only)**: 49246268, 49780577, 49618929, 48652983, 50000003, 48989740, 49973913, 49077610, 50144043, 48958613
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- Mean: 49.44 M ops/s
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- σ: 0.56 M ops/s
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- Δ vs A: -0.08%
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**Point C (C5+C6 Only)**: 52249144, 52038944, 52804475, 52441811, 52193156, 52561113, 51884004, 52336668, 52019796, 52196738
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- Mean: 52.27 M ops/s
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- σ: 0.38 M ops/s
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- Δ vs A: +5.63%
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**Point D (All ON)**: 52909030, 51748016, 53837633, 52436623, 53136539, 52671717, 54071840, 52759324, 52769820, 53374875
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- Mean: 52.97 M ops/s
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- σ: 0.92 M ops/s
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- Δ vs A: **+7.05%**
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---
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## Sub-Additivity Analysis
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### Additivity Calculation
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If C4 and C5+C6 gains were **purely additive**, we would expect:
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```
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Expected D = A + (B-A) + (C-A)
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= 49.48 + (-0.04) + (2.79)
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= 52.23 M ops/s
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```
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**Actual D**: 52.97 M ops/s
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**Sub-additivity loss**: **-1.42%** (negative indicates **SUPER-ADDITIVITY**)
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### Interpretation
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The combined C4+C5+C6 gain is **1.42% better than additive**, indicating **synergistic interaction**:
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- C4 solo: -0.08% (detrimental when C5/C6 OFF)
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- C5+C6 solo: +5.63% (strong gain)
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- C4+C5+C6 combined: +7.05% (super-additive!)
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- **Marginal contribution of C4 in full stack**: +1.27% (vs D vs C)
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**Key Insight**: C4 optimization is **context-dependent**. It provides minimal or negative benefit when the hot allocation path still goes through the full unified_cache. But when C5+C6 are already on the fast path (reducing unified_cache traffic for 85.7% of operations), C4 becomes synergistic on the remaining 14.3% of operations.
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---
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## Decision Matrix
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### Success Criteria
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| Criterion | Threshold | Actual | Pass |
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|-----------|-----------|--------|------|
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| **GO Threshold** | ≥ +1.0% | **+7.05%** | ✓ |
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| **Ideal Threshold** | ≥ +3.0% | **+7.05%** | ✓ |
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| **Sub-additivity** | < 20% loss | **-1.42% (super-additive)** | ✓ |
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| **Pattern consistency** | D > C > A | ✓ | ✓ |
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### Decision: **STRONG GO**
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**Rationale**:
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1. **Cumulative gain of +7.05%** exceeds ideal threshold (+3.0%) by +4.05pp
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2. **Super-additive behavior** (actual > expected) indicates positive interaction synergy
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3. **All thresholds exceeded** with robust measurement across 40 total runs
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4. **Clear hierarchy**: D > C > A (with B showing context-dependent behavior)
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**Quality Rating**: **Excellent GO** (exceeds threshold by +4.05pp, demonstrates synergistic gains)
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---
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## Comparison to Phase 75-3 (C5+C6 Matrix)
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### Phase 75-3 Results
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| Point | Config | Throughput | Delta |
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|-------|--------|-----------|-------|
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| A | C5=0, C6=0 | 42.36 M ops/s | - |
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| B | C5=1, C6=0 | 43.54 M ops/s | +2.79% |
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| C | C5=0, C6=1 | 44.25 M ops/s | +4.46% |
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| D | C5=1, C6=1 | 44.65 M ops/s | +5.41% |
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### Phase 76-2 Results (with C4)
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| Point | Config | Throughput | Delta |
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|-------|--------|-----------|-------|
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| A | C4=0, C5=0, C6=0 | 49.48 M ops/s | - |
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| B | C4=1, C5=0, C6=0 | 49.44 M ops/s | -0.08% |
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| C | C4=0, C5=1, C6=1 | 52.27 M ops/s | +5.63% |
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| D | C4=1, C5=1, C6=1 | 52.97 M ops/s | +7.05% |
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### Key Differences
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1. **Baseline Difference**: Phase 75-3 baseline (42.36M) vs Phase 76-2 baseline (49.48M)
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- Different warm-up/system conditions
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- Percentage gains are directly comparable
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2. **C5+C6 Contribution**:
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- Phase 75-3: +5.41% (isolated)
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- Phase 76-2 Point C: +5.63% (confirms reproducibility)
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3. **C4 Contribution**:
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- Phase 75-3: N/A (C4 not yet measured)
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- Phase 76-2 Point B: -0.08% (alone), +1.27% marginal (in full stack)
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4. **Cumulative Effect**:
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- Phase 75-3 (C5+C6): +5.41%
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- Phase 76-2 (C4+C5+C6): +7.05%
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- **Additional contribution from C4**: +1.64pp
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---
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## Insights: Context-Dependent Optimization
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### C4 Behavior Analysis
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**Finding**: C4 inline slots show paradoxical behavior:
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- **Standalone** (C4 only, C5/C6 OFF): **-0.08%** (regression)
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- **In context** (C4 with C5+C6 ON): **+1.27%** (gain)
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**Hypothesis**:
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When C5+C6 are OFF, the allocation fast path still heavily uses unified_cache for all size classes (C0-C7). C4 inline slots add TLS overhead without significant branch elimination benefit.
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When C5+C6 are ON, unified_cache traffic for C5-C6 is eliminated (85.7% of operations avoid unified_cache). The remaining C4 operations see more benefit from inline slots because:
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1. TLS overhead is amortized across fewer unified_cache operations
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2. Branch prediction state improves without C5/C6 hot traffic
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3. L1-dcache pressure from inline slots is offset by reduced unified_cache accesses
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**Implication**: Per-class optimizations are **not independently additive** but **context-dependent**. This validates the importance of 4-point matrix testing before promoting optimizations.
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---
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## Per-Class Coverage Summary (Final)
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### C4-C7 Optimization Complete
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| Class | Size Range | Coverage % | Optimization | Individual Gain | Cumulative Status |
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|-------|-----------|-----------|--------------|-----------------|-------------------|
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| C6 | 1025-2048B | 57.17% | Inline Slots | +2.87% | ✅ |
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| C5 | 513-1024B | 28.55% | Inline Slots | +1.10% | ✅ |
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| C4 | 257-512B | 14.29% | Inline Slots | +1.27% (in context) | ✅ |
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| C7 | 2049-4096B | 0.00% | N/A | N/A | ✅ NO-GO |
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| **Combined C4-C6** | **256-2048B** | **100%** | **Inline Slots** | **+7.05%** | **✅ STRONG GO** |
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### Measurement Progression
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1. **Phase 75-1** (C6 only): +2.87% (10-run A/B)
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2. **Phase 75-2** (C5 only, isolated): +1.10% (10-run A/B)
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3. **Phase 75-3** (C5+C6 interaction): +5.41% (4-point matrix)
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4. **Phase 76-0** (C7 analysis): NO-GO (0% operations)
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5. **Phase 76-1** (C4 in context): +1.73% (10-run A/B with C5+C6 ON)
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6. **Phase 76-2** (C4+C5+C6 interaction): **+7.05%** (4-point matrix, super-additive)
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---
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## Recommended Actions
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### Immediate (Completed)
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1. ✅ **C4 Inline Slots Promoted to SSOT**
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- `core/bench_profile.h`: C4 default ON
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- `scripts/run_mixed_10_cleanenv.sh`: C4 default ON
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- Combined C4+C5+C6 now **preset default**
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2. ✅ **Phase 76-2 Results Documented**
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- This file: `PHASE76_2_C4C5C6_MATRIX_RESULTS.md`
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- `CURRENT_TASK.md` updated with Phase 76-2
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### Optional (Future Phases)
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3. **FAST PGO Rebase** (Track B - periodic, not decision-point)
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- Monitor code bloat impact from C4 addition
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- Regenerate PGO profile with C4+C5+C6=ON if code bloat becomes concern
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- Track mimalloc ratio progress (secondary metric)
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4. **Next Optimization Axis** (Phase 77+)
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- C4+C5+C6 optimizations complete and locked to SSOT
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- Explore new optimization strategies:
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- Allocation fast-path further optimization
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- Metadata/page lookup optimization
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- Alternative size-class strategies (C3/C2)
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---
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## Artifacts
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### Test Logs
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- `/tmp/phase76_2_point_A.log` (C4=0, C5=0, C6=0)
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- `/tmp/phase76_2_point_B.log` (C4=1, C5=0, C6=0)
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- `/tmp/phase76_2_point_C.log` (C4=0, C5=1, C6=1)
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- `/tmp/phase76_2_point_D.log` (C4=1, C5=1, C6=1)
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### Analysis Script
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- `/tmp/phase76_2_analysis.sh` (matrix calculation)
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- `/tmp/phase76_2_matrix_test.sh` (test harness)
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### Binary Information
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- Binary: `./bench_random_mixed_hakmem`
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- Build time: 2025-12-18 (Phase 76-1)
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- Size: 674K
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- Compiler: gcc -O3 -march=native -flto
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---
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## Conclusion
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Phase 76-2 validates that **C4+C5+C6 inline slots deliver +7.05% cumulative throughput gain** on Standard binary, completing comprehensive optimization of C4-C7 size class allocations.
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**Critical Discovery**: Per-class optimizations are **context-dependent** rather than independently additive. C4 shows negative performance in isolation but strong synergistic gains when C5+C6 are already optimized. This finding emphasizes the importance of 4-point matrix testing before promoting multi-stage optimizations.
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**Recommendation**: Lock C4+C5+C6 configuration as SSOT baseline (✅ completed). Proceed to next optimization axis (Phase 77+) with confidence that per-class inline slots optimization is exhausted.
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---
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**Phase 76-2 Status**: ✓ COMPLETE (STRONG GO, +7.05% super-additive gain validated)
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**Next Phase**: Phase 77 (Alternative optimization axes) or FAST PGO periodic tracking (Track B)
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