65763c1ed6
## 概要 LLVM backend のCall処理、PHI wiring、Plugin loader を強化。 次のリファクタリング（箱化モジュール化）のための準備も含む。 ## 変更内容 ### LLVM Call処理強化 - `mir_call/__init__.py`: Call ルーティングロジック改善 - `mir_call/global_call.py`: print処理の marshal強化 - `mir_call/method_call.py`: メソッド呼び出し処理改善 - `boxcall.py`: BoxCall処理改善 ### PHI処理強化 - `phi_manager.py`: PHI管理改善 - `phi_wiring/wiring.py`: PHI配線ロジック強化（+17行） - `phi_wiring/tagging.py`: Type tagging改善 - `resolver.py`: Value解決ロジック強化（+34行） ### Copy伝播 - `copy.py`: Copy命令のType tag伝播追加（+10行） ### Plugin loader強化 - `library.rs`: エラー出力改善、[plugin/missing]ログ追加（+34行） - fail-fast強化 ### テスト - `phase97_json_loader_escape_llvm_exe.sh`: Phase 97 E2Eテスト追加 - `phase97_next_non_ws_llvm_exe.sh`: Phase 97 E2Eテスト追加 ### その他 - `nyash_kernel/lib.rs`: Kernel側の改善（+23行） ## 統計 - 14ファイル変更 - +256行 / -53行 = +203 net ## 次のリファクタリング準備 以下の箇所がリファクタリング対象として識別済み： 1. Call ルーティング箱の明文化 2. print の marshal 箱 3. TypeFacts/Tagging 箱の一本化 4. PHI Snapshot 契約のSSOT 5. Plugin loader のエラー出力統合 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com>
61 lines
2.3 KiB
Python
61 lines
2.3 KiB
Python
"""
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Copy instruction lowering
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MIR13 PHI-off uses explicit copies along edges/blocks to model merges.
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"""
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import llvmlite.ir as ir
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from typing import Dict, Optional, Any
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from utils.values import resolve_i64_strict, safe_vmap_write
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def lower_copy(
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builder: ir.IRBuilder,
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dst: int,
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src: int,
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vmap: Dict[int, ir.Value],
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resolver=None,
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current_block=None,
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preds=None,
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block_end_values=None,
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bb_map=None,
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ctx: Optional[Any] = None,
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):
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"""Lower a copy by mapping dst to src value in the current block scope.
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Prefer same-block SSA from vmap; fallback to resolver to preserve
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dominance and to localize values across predecessors.
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"""
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# If BuildCtx is provided, prefer its maps for consistency.
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if ctx is not None:
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try:
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if getattr(ctx, 'resolver', None) is not None:
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resolver = ctx.resolver
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if getattr(ctx, 'vmap', None) is not None and vmap is None:
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vmap = ctx.vmap
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if getattr(ctx, 'preds', None) is not None and preds is None:
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preds = ctx.preds
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if getattr(ctx, 'block_end_values', None) is not None and block_end_values is None:
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block_end_values = ctx.block_end_values
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if getattr(ctx, 'bb_map', None) is not None and bb_map is None:
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bb_map = ctx.bb_map
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except Exception:
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pass
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# Prefer local SSA; resolve otherwise to preserve dominance
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val = resolve_i64_strict(resolver, src, current_block, preds, block_end_values, vmap, bb_map)
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if val is None:
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val = ir.Constant(ir.IntType(64), 0)
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# Phase 131-12-P1: Object identity trace before write
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import os, sys
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if os.environ.get('NYASH_LLVM_VMAP_TRACE') == '1':
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print(f"[vmap/id] copy dst={dst} src={src} vmap id={id(vmap)} before_write", file=sys.stderr)
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safe_vmap_write(vmap, dst, val, "copy", resolver=resolver)
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# TypeFacts propagation (SSOT): preserve "stringish" tagging across Copy.
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# Many MIR patterns materialize a temp then Copy into a local; without this,
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# string equality/concat may incorrectly fall back to integer/handle ops.
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try:
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if resolver is not None and hasattr(resolver, "is_stringish") and resolver.is_stringish(src):
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if hasattr(resolver, "mark_string"):
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resolver.mark_string(dst)
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except Exception:
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pass
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