Commit Graph

5 Commits

Author SHA1 Message Date
c9366d5c54 Phase 11.8/12: MIR Core-13 roadmap, Nyash ABI design, async/await enhancements with TaskGroupBox foundation
Major additions:
- Phase 11.8 MIR cleanup specification (Core-15→14→13 roadmap)
- Nyash ABI unified design document (3×u64 structure)
- TaskGroupBox foundation with cancelAll/joinAll methods
- Enhanced async/await with checkpoint auto-insertion
- Structured concurrency preparation (parent-child task relationships)

Documentation:
- docs/development/roadmap/phases/phase-11.8_mir_cleanup/: Complete Core-13 path
- docs/development/roadmap/phases/phase-12/NYASH-ABI-DESIGN.md: Unified ABI spec
- Updated Phase 12 README with AOT/JIT explanation for script performance
- Added async_task_system/ design docs

Implementation progress:
- FutureBox spawn tracking with weak/strong reference management
- VM checkpoint integration before/after await
- LLVM backend async support preparation
- Verifier rules for await-checkpoint enforcement
- Result<T,E> normalization for timeout/cancellation

Technical insights:
- MIR as 'atomic instructions', Box as 'molecules' philosophy
- 'Everything is Box' enables full-stack with minimal instructions
- Unified BoxCall for array/plugin/async operations future consolidation

Next steps:
- Complete TaskGroupBox implementation
- Migrate from global to scoped task management
- Implement LIFO cleanup on scope exit
- Continue Core-13 instruction consolidation

🚀 'From 15 atoms to infinite programs: The Nyash Box Theory'
2025-09-02 03:41:51 +09:00
fff9749f47 📚 Reorganize CLAUDE.md: slim down from 916 to 395 lines with proper doc links
- Keep essential information within 500 lines (now 395 lines)
- Maintain important syntax examples and development principles
- Move detailed information to appropriate docs files:
  - Development practices → docs/guides/development-practices.md
  - Testing guide → docs/guides/testing-guide.md
  - Claude issues → docs/tools/claude-issues.md
- Add proper links to all referenced documentation
- Balance between minimal entry point and practical usability
2025-08-31 06:22:48 +09:00
b003bdf25b 📚 Phase 11 documentation: Everything is Box × MIR15 revolution
Key updates:
- Document MIR 26→15 instruction reduction plan (transitioning status)
- Add Core-15 target instruction set in INSTRUCTION_SET.md
- Save AI conference analyses validating Box Theory and 15-instruction design
- Create MIR annotation system proposal for optimization hints
- Update SKIP_PHASE_10_DECISION.md with LLVM direct migration rationale

Technical insights:
- RefNew/RefGet/RefSet can be eliminated through Box unification
- GC/sync/async all achievable with 15 core instructions
- BoxCall lowering can automatically insert GC barriers
- 2-3x performance improvement expected with LLVM
- Build time reduction 50%, binary size reduction 40%

Status: Design complete, implementation pending
2025-08-31 03:03:04 +09:00
e21778c048 phase_9_79b_1: Add Unified Registry IDs + Builder Slotting\n- MIR BoxCall carries optional method_id (slot)\n- Slot registry with universal slots [0..3]\n- Builder resolves method_id when receiver type known\n- Printer shows method_id; backends updated\n- Update CURRENT_TASK + MIR spec note 2025-08-26 20:48:48 +09:00
f82ad5a84d Phase 9.78h: VM BinOp and/or short-circuit + BoxRef<Integer> arithmetic; add diagnostic hooks. Update CURRENT_TASK with progress and VM path-tracing TODO. Align docs: MIR26 canonical spec and phase docs. 2025-08-26 00:06:35 +09:00