Major structural improvement driven by ChatGPT 5 Pro analysis:
- Replace all direct vmap access with Resolver API calls
- Add proper cursor/bb_map/preds/block_end_values to all instruction handlers
- Ensure dominance safety by localizing values through Resolver
- Fix parameter passing in invoke/fields/extern handlers
Key changes:
- boxcall: Use resolver.resolve_i64/ptr instead of direct vmap access
- strings: Remove unused recv_v parameter, use Resolver throughout
- invoke: Add missing context parameters for proper PHI handling
- fields: Add resolver and block context parameters
- flow/arith/maps: Consistent Resolver usage pattern
This addresses the "structural invariant" requirements:
1. All value fetching goes through Resolver (no direct vmap.get)
2. Localization happens at BB boundaries via Resolver
3. Better preparation for PHI-only-in-dispatch pattern
Next: Consider boxing excessive parameters (15+ args in some functions)
🤖 Generated with [Claude Code](https://claude.ai/code)
Co-Authored-By: Claude <noreply@anthropic.com>
Added paper-g-ai-assisted-compiler folder documenting:
- Week-long LLVM backend development with AI assistance
- Key insights from PHI/SSA struggles to Resolver API solution
- Development log capturing the chaotic reality
- Abstract in both English and Japanese
Key quote: 'I don't remember anymore' - capturing the authentic
experience of intensive AI-assisted development where the process
itself becomes the research data.
This represents potentially the first fully documented case of
building a compiler backend primarily through AI assistance.
- Added llvmlite verification harness strategy
- Python as parallel verification path for PHI/SSA issues
- Nyash ABI wrapper for LLVM emit abstraction
- NYASH_LLVM_USE_HARNESS=1 flag for mode switching
- Goal: Rust implementation in 1-2 days, Python for rapid verification
Acknowledging reality: When stuck at minimal viable implementation,
changing implementation language is a practical solution.
'Simple is Best' - the core Nyash philosophy.
- Added NYASH_LOOPFORM_LATCH2HEADER environment variable
- When enabled, latch block jumps back to header (completing the loop)
- When disabled (default), latch remains unreachable (safe mode)
- Preserves header predecessor count stability in default mode
This allows gradual testing of full LoopForm loop structure.
- Added LoopForm IR scaffolding with 5-block structure (header/body/dispatch/latch/exit)
- Implemented dispatch block with PHI nodes for tag(i8) and payload(i64)
- Created registry infrastructure for future body→dispatch wiring
- Header→dispatch wiring complete with Break=1 signal
- Gated behind NYASH_ENABLE_LOOPFORM=1 environment variable
- Successfully tested with loop_min_while.nyash (1120 bytes object)
Next steps:
- Implement 2-step Jump chain detection
- Add NYASH_LOOPFORM_BODY2DISPATCH for body→dispatch redirect
- Connect latch→header when safe
🚀 Phase 1 foundation complete and working!
- Add NYASH_ENABLE_LOOPFORM=1 gate for experimental loop normalization
- Detect simple while-patterns in Branch terminator (header→body→header)
- Add loopform.rs with scaffold for future Signal-based lowering
- Wire detection in codegen/mod.rs (non-invasive, logs only)
- Update CURRENT_TASK.md with LoopForm experimental plan
- Goal: Centralize PHIs at dispatch blocks, simplify terminator management
This is the first step towards the LoopForm IR revolution where
"Everything is Box × Everything is Loop". Currently detection-only,
actual lowering will follow once basic patterns are validated.
🤖 Generated with [Claude Code](https://claude.ai/code)
Co-Authored-By: Claude <noreply@anthropic.com>
