- Fix: Call with Callee::Method now includes receiver in used_values()
- Prevents DCE from eliminating Copy instructions that define receivers
- Pattern 3 (loop_if_phi.hako) now works correctly (sum=9)
- Add: NYASH_DCE_TRACE=1 for debugging eliminated instructions
- Shows which pure instructions DCE removes and from which block
- Cleanup: Consolidate Call used_values to single source of truth
- Early return in methods.rs handles all Call variants
- Removed duplicate match arm (now unreachable!())
- ChatGPT's suggestion for cleaner architecture
- Docs: Phase 166 analysis of inst_meta layer architecture
- Identified CSE pass callee bug (to be fixed next)
- Improvement proposals for CallLikeInst
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Co-Authored-By: Claude <noreply@anthropic.com>
Major changes:
- Split runner module: 1358→580 lines (via Gemini)
- Create new modules: dispatch.rs, selfhost.rs, pipeline.rs, pipe_io.rs
- Fix build errors from incomplete method migrations
- Add warning to CLAUDE.md about JIT/Cranelift not working
- Create interpreter.rs mode module
- Refactor loop builder into separate module
Build status:
- ✅ Executable builds successfully
- ✅ Basic execution works (tested with print)
- ⚠️ 106 warnings remain (to be cleaned up next)
- ⚠️ execute_mir_mode still in mod.rs (needs further migration)
Note: ChatGPT correctly fixed runner.execute_mir_mode() calls
that I incorrectly changed to super::modes::mir::
🤖 Generated with [Claude Code](https://claude.ai/code)
Co-Authored-By: Claude <noreply@anthropic.com>
Key updates:
- Document MIR 26→15 instruction reduction plan (transitioning status)
- Add Core-15 target instruction set in INSTRUCTION_SET.md
- Save AI conference analyses validating Box Theory and 15-instruction design
- Create MIR annotation system proposal for optimization hints
- Update SKIP_PHASE_10_DECISION.md with LLVM direct migration rationale
Technical insights:
- RefNew/RefGet/RefSet can be eliminated through Box unification
- GC/sync/async all achievable with 15 core instructions
- BoxCall lowering can automatically insert GC barriers
- 2-3x performance improvement expected with LLVM
- Build time reduction 50%, binary size reduction 40%
Status: Design complete, implementation pending
