Commit Graph

3 Commits

Author SHA1 Message Date
6f1d0df187 docs(plan): Phase 273 P4 - Plan Line SSOT Documentation Finalization
Phase 273 P4 では、Plan ライン(Extractor → Normalizer → Verifier → Lowerer)を
"current operational SSOT" として文書化し、アーキテクチャの収束を明文化した。

## Changes

### router.rs docstring 更新
- "Phase 273 P3: Plan Line is Current SSOT for Pattern6/7" セクション追加
- ルーティング戦略を明示(Plan entry points → legacy table)
- SSOT Entry Points を列挙(Pattern6/7 Normalizer, Pattern1-5 各 Lowerer)

### phase-273/README.md 更新
- P3 completion section 追加(generalized CoreLoopPlan 移行完了)
- P3+ Legacy Removal section 追加(~174 lines 削除記録)
- P4 Proposal section 追加(Documentation Finalization チェックリスト)
- SSOT Documentation Entry Points リスト追加(5 つの SSOT 入口)

### joinir-architecture-overview.md 更新
- Section 2.1.2 "Plan-Based Patterns (Pattern6-7, Phase 273 P3)" 追加
- Plan Extractor, Normalizer, Verifier, Lowerer の Box 構造を文書化
- Plan line vs JoinIR line 比較表追加(収束性・SSOT 特性の対比)
- SSOT characteristics リスト追加(Normalizer SSOT, emit_frag SSOT 等)

## SSOT Entry Points(Phase 273 P3 完了時点)

1. **ルーティング**: `router.rs::route_loop_pattern()` - Pattern6/7 Plan entry points
2. **型定義**: `plan/mod.rs` - DomainPlan/CorePlan 固定語彙
3. **正規化**: `plan/normalizer.rs` - Pattern 固有知識一元管理
4. **検証**: `plan/verifier.rs` - fail-fast 不変条件(V2-V9)
5. **降格**: `plan/lowerer.rs` - Pattern-agnostic MIR emission

## Test

-  VM regression: phase254_p0_index_of_vm.sh (PASS)
-  LLVM regression: phase258_p0_index_of_string_llvm_exe.sh (PASS)

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com>
2025-12-23 00:34:38 +09:00
1b7fd7a0ff refactor(plan): Phase 273 P3+ - Legacy code removal
Phase 273 P3+ 完成: レガシーコード削除 + 未使用 import 整理

Removed Legacy Items:
1. emit_scan_with_init_edgecfg() - Pattern6 固有の emission 関数
   - File deleted: src/mir/builder/emission/loop_scan_with_init.rs (~144 lines)
   - Replaced by: generalized Frag API (Phase 273 P2)

2. CoreCarrierInfo struct - Legacy carrier representation
   - Removed from: src/mir/builder/control_flow/plan/mod.rs (~15 lines)
   - Replaced by: CorePhiInfo (generalized PHI representation)

3. verify_carrier() function - CoreCarrierInfo validator
   - Removed from: src/mir/builder/control_flow/plan/verifier.rs (~15 lines)
   - Replaced by: generalized PHI verification (V7-V9)

Code Cleanup:
- cargo fix applied: unused imports removed (~30 files)
- Verifier invariants updated: V1→V2-V9 (carrier→PHI model)
- Module declaration cleanup in emission/mod.rs

Impact:
- Total lines removed: ~174 lines (net reduction)
- Pattern-agnostic architecture strengthened
- All legacy Pattern6 references eliminated

Tests:
-  VM tests PASS (phase254/256/258)
-  LLVM tests PASS (phase256/258)

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2025-12-23 00:11:20 +09:00
960241795d feat(mir/llvm): Phase 273 P0-P1 DomainPlan→CorePlan + LLVM arg fix
Phase 273 P0-P1: Two-layer plan architecture
- DomainPlan: Pattern-specific knowledge (ScanWithInit)
- CorePlan: Fixed vocabulary (Seq, Loop, If, Effect, Exit)
- ValueId references only (String expressions forbidden)
- Pipeline: Extractor→Normalizer→Verifier→Lowerer

New plan/ module:
- mod.rs: Type definitions, SSOT spec
- normalizer.rs: DomainPlan→CorePlan + ID allocation
- verifier.rs: V1-V6 invariant checks (fail-fast)
- lowerer.rs: CorePlan→MIR (pattern-agnostic)

LLVM fix (ChatGPT):
- function_lower.py: Fix argument reference bug
- Phase 258 index_of_string now PASS on LLVM backend

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2025-12-22 22:42:56 +09:00