feat(joinir): Phase 246-EX Part 2 - Exit PHI & step scheduling fixes

Phase 246-EX Part 2 completes the _atoi JoinIR integration:

Key fixes:
- Exit PHI connection: ExitLineReconnector now correctly uses exit PHI dsts
- Jump args preservation: BasicBlock.jump_args field stores JoinIR exit values
- instruction_rewriter: Reads jump_args, remaps JoinIR→HOST values by carrier order
- step_schedule.rs: New module for body-local init step ordering

Files changed:
- reconnector.rs: Exit PHI connection improvements
- instruction_rewriter.rs: Jump args reading & carrier value mapping
- loop_with_break_minimal.rs: Refactored step scheduling
- step_schedule.rs: NEW - Step ordering logic extracted

Tests: 931/931 PASS (no regression)

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>

src/mir/basic_block.rs

@@ -76,6 +76,12 @@ pub struct BasicBlock {
 
     /// Is this block sealed? (all predecessors are known)
     pub sealed: bool,
+
+    /// Phase 246-EX: Jump args metadata for exit PHI construction
+    /// When a JoinIR Jump is converted to MIR Return, this field preserves
+    /// all the Jump args (not just the first one) so that exit PHI can correctly
+    /// merge carrier values from multiple exit paths.
+    pub jump_args: Option<Vec<ValueId>>,
 }
 
 impl BasicBlock {
@@ -92,6 +98,7 @@ impl BasicBlock {
             effects: EffectMask::PURE,
             reachable: false,
             sealed: false,
+            jump_args: None, // Phase 246-EX: No jump args by default
         }
     }