mir/vm: SSA pin+PHI + short-circuit; user-defined method calls → functions; entry single-pred PHIs; compare-operand pin; VM BoxCall fallback to InstanceBox methods; docs: update CURRENT_TASK (plan + acceptance)

- Lower And/Or to branch+PHI (RHS not evaluated)
- Always slotify compare operands (dominance safety)
- Insert single-predecessor PHIs at then/else/short-circuit entries
- pin_to_slot now logs (NYASH_PIN_TRACE) and participates in PHI
- Rewrite user-defined instance method calls to Box.method/Arity (builder)
- VM fallback: BoxCall on InstanceBox dispatches to lowered functions with 'me'+args
- Keep plugin/BoxCall path for core boxes (String/Array/Map)
- Add env-gated pre-pin for if/loop (NYASH_MIR_PREPIN)
- CURRENT_TASK: add SSA/userbox plan, debug steps, acceptance criteria

src/mir/builder.rs

@@ -130,6 +130,8 @@ pub struct MirBuilder {
 
     /// Internal counter for temporary pin slots (block-crossing ephemeral values)
     temp_slot_counter: u32,
+    /// If true, skip entry materialization of pinned slots on the next start_new_block call.
+    suppress_pin_entry_copy_next: bool,
 }
 
 impl MirBuilder {
@@ -168,6 +170,7 @@ impl MirBuilder {
             cleanup_allow_throw: false,
             hint_sink: crate::mir::hints::HintSink::new(),
             temp_slot_counter: 0,
+            suppress_pin_entry_copy_next: false,
         }
     }
 
@@ -175,6 +178,9 @@ impl MirBuilder {
     pub(super) fn push_if_merge(&mut self, bb: BasicBlockId) { self.if_merge_stack.push(bb); }
     pub(super) fn pop_if_merge(&mut self) { let _ = self.if_merge_stack.pop(); }
 
+    /// Suppress entry pin copy for the next start_new_block (used for merge blocks).
+    pub(super) fn suppress_next_entry_pin_copy(&mut self) { self.suppress_pin_entry_copy_next = true; }
+
     // ---- Hint helpers (no-op by default) ----
     #[inline]
     pub(crate) fn hint_loop_header(&mut self) { self.hint_sink.loop_header(); }