feat(llvm): LoopForm IR experimental scaffolding (Phase 1)

- Add NYASH_ENABLE_LOOPFORM=1 gate for experimental loop normalization
- Detect simple while-patterns in Branch terminator (header→body→header)
- Add loopform.rs with scaffold for future Signal-based lowering
- Wire detection in codegen/mod.rs (non-invasive, logs only)
- Update CURRENT_TASK.md with LoopForm experimental plan
- Goal: Centralize PHIs at dispatch blocks, simplify terminator management

This is the first step towards the LoopForm IR revolution where
"Everything is Box × Everything is Loop". Currently detection-only,
actual lowering will follow once basic patterns are validated.

🤖 Generated with [Claude Code](https://claude.ai/code)

Co-Authored-By: Claude <noreply@anthropic.com>

src/backend/llvm/compiler/codegen/instructions/mod.rs

@@ -12,6 +12,7 @@ mod arrays;
 mod maps;
 mod arith_ops;
 mod call;
+mod loopform;
 
 pub(super) use blocks::{create_basic_blocks, precreate_phis};
 pub(super) use flow::{emit_branch, emit_jump, emit_return};
@@ -23,3 +24,4 @@ pub(super) use mem::{lower_load, lower_store};
 pub(super) use consts::lower_const;
 pub(super) use arith_ops::{lower_binop, lower_unary};
 pub(super) use call::lower_call;
+pub(super) use loopform::{LoopFormContext, lower_while_loopform};