📚 Phase 11 documentation: Everything is Box × MIR15 revolution

Key updates:
- Document MIR 26→15 instruction reduction plan (transitioning status)
- Add Core-15 target instruction set in INSTRUCTION_SET.md
- Save AI conference analyses validating Box Theory and 15-instruction design
- Create MIR annotation system proposal for optimization hints
- Update SKIP_PHASE_10_DECISION.md with LLVM direct migration rationale

Technical insights:
- RefNew/RefGet/RefSet can be eliminated through Box unification
- GC/sync/async all achievable with 15 core instructions
- BoxCall lowering can automatically insert GC barriers
- 2-3x performance improvement expected with LLVM
- Build time reduction 50%, binary size reduction 40%

Status: Design complete, implementation pending

src/runner.rs

@@ -1086,6 +1086,25 @@ mod tests {
             iterations: 10,
             vm_stats: false,
             vm_stats_json: false,
+            // JIT defaults for test
+            jit_exec: false,
+            jit_stats: false,
+            jit_stats_json: false,
+            jit_dump: false,
+            jit_events: false,
+            jit_events_compile: false,
+            jit_events_runtime: false,
+            jit_events_path: None,
+            jit_threshold: None,
+            jit_phi_min: false,
+            jit_hostcall: false,
+            jit_handle_debug: false,
+            jit_native_f64: false,
+            jit_native_bool: false,
+            emit_cfg: None,
+            jit_only: false,
+            jit_direct: false,
+            cli_verbose: false,
         };
         
         let runner = NyashRunner::new(config);