📚 Phase 11 documentation: Everything is Box × MIR15 revolution
Key updates: - Document MIR 26→15 instruction reduction plan (transitioning status) - Add Core-15 target instruction set in INSTRUCTION_SET.md - Save AI conference analyses validating Box Theory and 15-instruction design - Create MIR annotation system proposal for optimization hints - Update SKIP_PHASE_10_DECISION.md with LLVM direct migration rationale Technical insights: - RefNew/RefGet/RefSet can be eliminated through Box unification - GC/sync/async all achievable with 15 core instructions - BoxCall lowering can automatically insert GC barriers - 2-3x performance improvement expected with LLVM - Build time reduction 50%, binary size reduction 40% Status: Design complete, implementation pending
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@ -55,9 +55,18 @@ impl NyashRunner {
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}
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}
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// Optional: VM-only escape analysis to elide barriers before execution
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let mut module_vm = compile_result.module.clone();
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if std::env::var("NYASH_VM_ESCAPE_ANALYSIS").ok().as_deref() == Some("1") {
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let removed = nyash_rust::mir::passes::escape::escape_elide_barriers_vm(&mut module_vm);
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if removed > 0 && std::env::var("NYASH_CLI_VERBOSE").ok().as_deref() == Some("1") {
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eprintln!("[VM] escape_elide_barriers: removed {} barriers", removed);
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}
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}
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// Execute with VM using prepared runtime
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let mut vm = VM::with_runtime(runtime);
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match vm.execute_module(&compile_result.module) {
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match vm.execute_module(&module_vm) {
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Ok(result) => {
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println!("✅ VM execution completed successfully!");
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// Pretty-print using MIR return type when available to avoid Void-looking floats/bools
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