feat(joinir): Phase 286 P2/P2.1/P2.2 - JoinIR Line Absorption (Pattern1/4 Plan化 PoC + hygiene)

Phase 286 P2: Pattern4 (Loop with Continue) を Plan/Frag SSOT に移行
- DomainPlan::Pattern4Continue 追加
- PlanNormalizer::normalize_pattern4_continue() 実装（phi_bindings による PHI dst 優先参照）
- Router integration（Plan line routing → legacy fallback）
- Integration test PASS (output: 6), quick smoke 154/154 PASS

Phase 286 P2.1: Pattern1 (SimpleWhile) を Plan/Frag SSOT に移行
- DomainPlan::Pattern1SimpleWhile 追加
- PlanNormalizer::normalize_pattern1_simple_while() 実装（4ブロック、1 PHI、phi_bindings 流用）
- Router integration（Plan line routing → legacy fallback）
- Integration test PASS (return: 3), quick smoke 154/154 PASS

Phase 286 P2.2: hygiene（extractor重複排除 + router小整理）
- extractor helper化: extract_loop_increment_plan を common_helpers.rs に統一
  - Pattern1/Pattern4 が呼ぶだけに変更（重複排除 ~25行）
- router helper化: lower_via_plan() を追加し Pattern6/7/4/1 で共用
  - 3行パターン（normalize→verify→lower）を1関数に集約（ボイラープレート削減 ~40行）

成果物:
- DomainPlan 2パターン新規追加（Pattern1SimpleWhile, Pattern4Continue）
- Normalizer 2つの normalize 関数追加
- Router に Plan line ブロック追加 + lower_via_plan() helper
- Extractor に extract_pattern1_plan() 追加
- Integration fixtures 2個 + smoke tests 2個

検証:
- quick smoke: 154/154 PASS
- integration: phase286_pattern1_frag_poc PASS, phase286_pattern4_frag_poc PASS
- Plan line routing: route=plan strategy=extract で Pattern1/4 検出確認

🤖 Generated with Claude Code

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>

src/mir/builder/utils.rs

@@ -1,5 +1,5 @@
 use super::{BasicBlock, BasicBlockId};
-use crate::mir::{BarrierOp, SpannedInstruction, TypeOpKind, WeakRefOp};
+use crate::mir::{BarrierOp, MirType, SpannedInstruction, TypeOpKind, WeakRefOp};
 use std::sync::atomic::{AtomicUsize, Ordering};
 // include path resolver removed (using handles modules)
 
@@ -56,6 +56,17 @@ impl super::MirBuilder {
         }
     }
 
+    /// Allocate a new ValueId and register its MIR type (convenience helper).
+    ///
+    /// This is a readability helper for code that repeatedly does:
+    /// `let v = next_value_id(); type_ctx.value_types.insert(v, ty);`
+    #[inline]
+    pub(crate) fn alloc_typed(&mut self, ty: MirType) -> super::ValueId {
+        let value_id = self.next_value_id();
+        self.type_ctx.value_types.insert(value_id, ty);
+        value_id
+    }
+
     /// Allocate a new BasicBlockId
     ///
     /// Phase 136 Step 2/7 + Phase 2-2: Uses core_ctx as SSOT (no sync needed).