feat(joinir): Phase 33-22 CommonPatternInitializer & JoinIRConversionPipeline integration
Unifies initialization and conversion logic across all 4 loop patterns, eliminating code duplication and establishing single source of truth. ## Changes ### Infrastructure (New) - CommonPatternInitializer (117 lines): Unified loop var extraction + CarrierInfo building - JoinIRConversionPipeline (127 lines): Unified JoinIR→MIR→Merge flow ### Pattern Refactoring - Pattern 1: Uses CommonPatternInitializer + JoinIRConversionPipeline (-25 lines) - Pattern 2: Uses CommonPatternInitializer + JoinIRConversionPipeline (-25 lines) - Pattern 3: Uses CommonPatternInitializer + JoinIRConversionPipeline (-25 lines) - Pattern 4: Uses CommonPatternInitializer + JoinIRConversionPipeline (-40 lines) ### Code Reduction - Total reduction: ~115 lines across all patterns - Zero code duplication in initialization/conversion - Pattern files: 806 lines total (down from ~920) ### Quality Improvements - Single source of truth for initialization - Consistent conversion flow across all patterns - Guaranteed boundary.loop_var_name setting (prevents SSA-undef bugs) - Improved maintainability and testability ### Testing - All 4 patterns tested and passing: - Pattern 1 (Simple While): ✅ - Pattern 2 (With Break): ✅ - Pattern 3 (If-Else PHI): ✅ - Pattern 4 (With Continue): ✅ ### Documentation - Phase 33-22 inventory and results document - Updated joinir-architecture-overview.md with new infrastructure ## Breaking Changes None - pure refactoring with no API changes 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
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docs/development/current/main/PHASE_33_16_SUMMARY.md
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# Phase 33-16 Implementation Summary
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**Date**: 2025-12-07
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**Status**: ✅ Complete detailed design with concrete implementation steps
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**Files Saved**: 4 comprehensive guides in `docs/development/current/main/`
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---
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## What You Asked
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You wanted to understand the exact flow for implementing **Phase 33-16: Loop Header PHI SSOT**, specifically:
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1. Where exactly should LoopHeaderPhiBuilder::build() be called?
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2. How do I get the header_block_id?
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3. How do I get the loop variable's initial value?
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4. Where should instruction_rewriter record latch_incoming?
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5. Should Phase 33-15 skip logic be removed or modified?
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---
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## What You Got
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### 4 Comprehensive Implementation Guides
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1. **phase33-16-implementation-plan.md** (18 KB)
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- Executive summary of architecture change
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- Problem analysis and solution
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- 6 concrete implementation steps with exact line numbers
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- Testing strategy
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- Risk analysis
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- Checklist and dependencies
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2. **phase33-16-qa.md** (11 KB)
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- Direct answers to all 5 of your questions
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- Exact code snippets ready to copy-paste
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- "What you DON'T need" guidance
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- Complete flow summary
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3. **phase33-16-visual-guide.md** (22 KB)
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- Architecture flow diagram showing all 7 phases
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- Code change map with file locations
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- 7 complete code changes (copy-paste ready)
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- Complete flow checklist
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- Testing commands
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- Summary table
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4. **This document** - Quick reference
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---
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## TL;DR: Quick Answers
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### Q1: Where to call build()?
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**Answer**: Line 107 in `merge/mod.rs`, **after** `remap_values()`
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- Phase 3.5 (new phase between remap and instruction_rewriter)
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- Pass mutable reference to instruction_rewriter
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### Q2: How to get header_block_id?
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**Answer**:
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```rust
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let entry_block_id = remapper
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.get_block(entry_func_name, entry_func.entry_block)?;
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let header_block_id = entry_block_id; // For Pattern 2
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```
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### Q3: How to get loop_var_init?
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**Answer**:
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```rust
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let loop_var_init = remapper
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.get_value(ValueId(0))?; // JoinIR param slot is always 0
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```
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### Q4: Where to record latch_incoming?
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**Answer**: In tail call section (line ~300 in instruction_rewriter.rs), after parameter bindings:
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```rust
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loop_header_phi_info.set_latch_incoming(loop_var_name, target_block, latch_value);
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```
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### Q5: Should skip logic be removed?
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**Answer**: **NO**. Modify with fallback mechanism:
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- Use header PHI dst when available (Phase 33-16)
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- Fall back to parameter for backward compatibility
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- Explicit "Using PHI" vs "Fallback" logs
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---
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## Architecture Evolution
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### Phase 33-15 (Current - Stop-gap)
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```
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Loop Parameter → (undefined SSA) → SSA-undef error
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```
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### Phase 33-16 (Your implementation)
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```
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Loop Parameter → Header PHI (allocated in Phase 3.5)
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↓
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Exit values use PHI dst (Phase 4/5)
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↓
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SSA-correct (PHI dst is defined!)
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```
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---
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## Implementation Scope
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**Files to modify**: 2 files, 7 locations
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- `src/mir/builder/control_flow/joinir/merge/mod.rs` (2 locations)
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- `src/mir/builder/control_flow/joinir/merge/instruction_rewriter.rs` (5 locations)
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**Lines added**: ~100 lines
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**Lines modified**: ~100 lines
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**Lines removed**: 0 (backward compatible)
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**Compilation time**: Should be clean, no new dependencies
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---
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## Key Architectural Insight
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**Loop Header PHI as Single Source of Truth (SSOT)**
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The brilliant design moves from "skip and hope" to "allocate early, finalize late":
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1. **Phase 3.5**: Allocate PHI dsts BEFORE processing instructions
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- Why: So instruction_rewriter knows what values to use
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- Cost: One extra pass through carrier info
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2. **Phase 4**: instruction_rewriter sets latch incoming from tail calls
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- Why: Only found during instruction processing
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- Benefit: No need to analyze loop structure separately
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3. **Phase 4.5**: Finalize emits PHIs into blocks
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- Why: All incoming edges must be set first
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- Benefit: Validation that all latch incoming are set
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4. **Phase 5**: exit_phi_builder gets carrier_phis from header PHIs
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- Why: Header PHI dsts are guaranteed SSA-defined
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- Benefit: No more undefined parameter references!
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---
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## Testing Roadmap
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### Before You Start
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```bash
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cargo build --release # Baseline clean build
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```
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### After Each Implementation Step
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```bash
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# Compile after step 1 (Phase 3.5)
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cargo build --release
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# Compile after step 2 (signature update)
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cargo build --release
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# Debug output verification (all steps)
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NYASH_JOINIR_DEBUG=1 ./target/release/nyash --dump-mir \
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apps/tests/joinir_min_loop.hako 2>&1 | grep "Phase 33-16"
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```
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### Final Integration Test
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```bash
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# Expected MIR structure
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./target/release/nyash --emit-mir-json mir.json apps/tests/joinir_min_loop.hako
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jq '.functions[0].blocks[0].instructions[0:3]' mir.json
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# First 3 instructions should include PHI nodes!
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```
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---
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## Implementation Strategy
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### Recommended Order
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1. ✅ **Step 1**: Add Phase 3.5 (build call in merge/mod.rs)
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2. ✅ **Step 2**: Update instruction_rewriter signature
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3. ✅ **Step 3**: Add latch tracking in tail call section
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4. ✅ **Step 4**: Replace exit_phi_inputs skip logic
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5. ✅ **Step 5**: Replace carrier_inputs skip logic
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6. ✅ **Step 6**: Add Phase 4.5 (finalize call)
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7. ✅ **Step 7**: Update module documentation
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**Compile after steps 2, 3, 4, 5, 6 to catch errors early**
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### Fallback Strategy
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If something breaks:
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1. Check if loop_var_name is being set (pattern2_with_break.rs line 200)
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2. Verify remapper has both block AND value mappings (Phase 3)
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3. Check that instruction_rewriter receives mutable reference
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4. Verify finalize() is called with all latch_incoming set
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---
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## What Gets Fixed
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### SSA-Undef Errors (Phase 33-15)
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```
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[mir] Error: SSA-undef: ValueId(X) referenced but not defined
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Context: exit_phi_inputs [(exit_block, ValueId(X))]
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Cause: X is JoinIR parameter (i_param), not SSA-defined
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```
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**Fixed in Phase 33-16**:
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- Use header PHI dst (ValueId(101)) instead of parameter (ValueId(X))
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- Header PHI dst IS SSA-defined (allocated + finalized)
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### Exit Value Propagation
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```
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Before: variable_map["i"] = pre-loop value (initial value)
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After: variable_map["i"] = header PHI dst (current iteration value)
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```
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---
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## Files Provided
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### Documentation Directory
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```
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docs/development/current/main/
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├── phase33-16-implementation-plan.md ← Full implementation roadmap
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├── phase33-16-qa.md ← Your questions answered
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├── phase33-16-visual-guide.md ← Diagrams + copy-paste code
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└── PHASE_33_16_SUMMARY.md ← This file
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```
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### How to Use Them
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1. **Start here**: phase33-16-qa.md
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- Read the 5 Q&A sections
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- Understand the core concepts
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2. **For detailed context**: phase33-16-implementation-plan.md
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- Problem analysis
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- Risk assessment
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- Testing strategy
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3. **For implementation**: phase33-16-visual-guide.md
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- Architecture diagrams
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- Complete code changes (copy-paste ready)
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- File locations with line numbers
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---
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## Next Steps After Implementation
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### Phase 33-16 Complete
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1. Verify MIR has header PHI instructions
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2. Verify exit values reference header PHI dsts
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3. Run joinir_min_loop.hako test
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4. Check variable_map is correctly updated
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### Phase 33-16+
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1. Extract multiple carriers from exit_bindings
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2. Handle Pattern 3+ with multiple PHIs
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3. Optimize constant carriers
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4. Update other pattern lowerers
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### Phase 34+
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1. Pattern 4 (continue statement)
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2. Trim patterns with complex carriers
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3. Loop-as-expression integration
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4. Performance optimizations
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---
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## Key Takeaway
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**Phase 33-16 is about moving from "undefined parameters" to "SSA-defined PHI destinations".**
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The architecture is elegant because it:
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- ✅ Allocates early (Phase 3.5) for instruction rewriter to use
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- ✅ Tracks during processing (Phase 4) for accurate values
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- ✅ Finalizes late (Phase 4.5) for validation
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- ✅ Uses in exit phase (Phase 6) with guaranteed SSA definitions
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No magic, no hacks, just clear responsibility separation and SSA-correct design!
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---
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## Questions?
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If you have questions while implementing:
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1. Check **phase33-16-qa.md** for direct answers
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2. Check **phase33-16-visual-guide.md** for code locations
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3. Check **phase33-16-implementation-plan.md** for design rationale
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All documents saved to `docs/development/current/main/`
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Good luck with the implementation! 🚀
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