feat(llvm): Phase 132 - Pattern 1 exit value parity fix + Box-First refactoring
## Phase 132: Exit PHI Value Parity Fix ### Problem Pattern 1 (Simple While) returned 0 instead of final loop variable value (3) - VM: RC: 3 ✅ (correct) - LLVM: Result: 0 ❌ (wrong) ### Root Cause (Two Layers) 1. **JoinIR/Boundary**: Missing exit_bindings → ExitLineReconnector not firing 2. **LLVM Python**: block_end_values snapshot dropping PHI values ### Fix **JoinIR** (simple_while_minimal.rs): - Jump(k_exit, [i_param]) passes exit value **Boundary** (pattern1_minimal.rs): - Added LoopExitBinding with carrier_name="i", role=LoopState - Enables ExitLineReconnector to update variable_map **LLVM** (block_lower.py): - Use predeclared_ret_phis for reliable PHI filtering - Protect builder.vmap PHIs from overwrites (SSOT principle) ### Result - ✅ VM: RC: 3 - ✅ LLVM: Result: 3 - ✅ VM/LLVM parity achieved ## Phase 132-Post: Box-First Refactoring ### Rust Side **JoinModule::require_function()** (mod.rs): - Encapsulate function search logic - 10 lines → 1 line (90% reduction) - Reusable for Pattern 2-5 ### Python Side **PhiManager Box** (phi_manager.py - new): - Centralized PHI lifecycle management - 47 lines → 8 lines (83% reduction) - SSOT: builder.vmap owns PHIs - Fail-Fast: No silent overwrites **Integration**: - LLVMBuilder: Added phi_manager - block_lower.py: Delegated to PhiManager - tagging.py: Register PHIs with manager ### Documentation **New Files**: - docs/development/architecture/exit-phi-design.md - docs/development/current/main/investigations/phase132-llvm-exit-phi-wrong-result.md - docs/development/current/main/phases/phase-132/ **Updated**: - docs/development/current/main/10-Now.md - docs/development/current/main/phase131-3-llvm-lowering-inventory.md ### Design Principles - Box-First: Logic encapsulated in classes/methods - SSOT: Single Source of Truth (builder.vmap for PHIs) - Fail-Fast: Early explicit failures, no fallbacks - Separation of Concerns: 3-layer architecture 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com>
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@ -74,12 +74,32 @@ impl MirBuilder {
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// Phase 179-B: Create boundary from context
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// Phase 201: Use JoinInlineBoundaryBuilder for clean construction
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// Canonical Builder pattern - see docs/development/current/main/joinir-boundary-builder-pattern.md
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//
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// Phase 132: Add exit_bindings to enable ExitLineReconnector
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// This ensures `return i` after loop returns the final value (3) instead of initial (0)
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use crate::mir::join_ir::lowering::JoinInlineBoundaryBuilder;
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use crate::mir::join_ir::lowering::inline_boundary::LoopExitBinding;
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use crate::mir::join_ir::lowering::carrier_info::CarrierRole;
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// Phase 132-Post: Extract k_exit's parameter ValueId from join_module (Box-First)
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let k_exit_func = join_module.require_function("k_exit", "Pattern 1");
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let join_exit_value = k_exit_func.params.first().copied()
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.expect("k_exit must have parameter for exit value");
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// Phase 132: Create exit binding for loop variable
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let exit_binding = LoopExitBinding {
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carrier_name: ctx.loop_var_name.clone(),
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join_exit_value,
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host_slot: ctx.loop_var_id,
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role: CarrierRole::LoopState,
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};
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let boundary = JoinInlineBoundaryBuilder::new()
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.with_inputs(
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vec![ValueId(0)], // JoinIR's main() parameter (loop variable)
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vec![ctx.loop_var_id], // Host's loop variable
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)
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.with_exit_bindings(vec![exit_binding]) // Phase 132: Enable exit PHI & variable_map update
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.with_loop_var_name(Some(ctx.loop_var_name.clone())) // Phase 33-16: Enable header PHI generation for SSA correctness
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.build();
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