66 lines
1.6 KiB
Markdown
66 lines
1.6 KiB
Markdown
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# Phase 276 P0: Quick wins (LLVM harness maintainability)
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Status: ✅ completed (2025-12-22)
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This sheet documents what Phase 276 P0 targeted (and can be used to reproduce the intent for future refactors).
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Reference completion:
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- `docs/development/current/main/phases/phase-276/P0-COMPLETION.md`
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Non-goals:
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- pipeline unification / order drift fixes (tracked as Phase 279)
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- new language features
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- new env vars
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---
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## Task 1: Remove noisy debug leftovers
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Target:
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- `src/llvm_py/phi_wiring/wiring.py`
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Acceptance:
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- no stacktrace spam in normal runs
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---
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## Task 2: Consolidate PHI dst type lookup into SSOT
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Create:
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- `src/llvm_py/phi_wiring/type_helper.py`
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Provide:
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- `get_phi_dst_type(...)` (SSOT for “what is the intended type of this ValueId?”)
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- `dst_type_to_llvm_type(...)` (SSOT for MIR dst_type → LLVM IR type)
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Integrate (remove duplicate logic):
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- `src/llvm_py/phi_wiring/tagging.py`
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- `src/llvm_py/llvm_builder.py`
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- `src/llvm_py/phi_wiring/wiring.py`
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Acceptance:
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- the same ValueId gets the same effective type across these entry points
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- adding a new MIR dst_type requires changing only `type_helper.py`
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---
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## Task 3: Make PHI type mismatch visible
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Target:
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- `src/llvm_py/phi_wiring/wiring.py`
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Policy:
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- important mismatch warnings should be visible even without debug env vars
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- keep the full trace behind the existing debug gate
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---
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## Task 4: Confirm the change does not regress existing smokes
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Minimum:
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- build still succeeds
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- representative LLVM harness runs still pass (no new failures)
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Note:
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- If a failure points to “two pipelines / ordering drift”, treat it as Phase 279 scope.
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