d378ee11a0
- Implement Box BenchMeta pattern in bench_random_mixed.c (BENCH_META_CALLOC/FREE) - Add enhanced debug logging to external_guard_box.h (caller tracking, FG classification) - Document investigation in PHASE15_BUG_ANALYSIS.md Issue: Page-aligned MIDCAND pointer not in SuperSlab registry → ExternalGuard → crash Hypothesis: May be pre-existing SuperSlab bug (not Phase 15-specific) Next: Test in Phase 14-C to verify
459 lines
17 KiB
C
459 lines
17 KiB
C
// tiny_ultra_hot.h - Ultra-fast hot path for C2/C3/C4/C5 (16B-128B allocations)
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// Purpose:
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// - Minimize L1 dcache misses (30x → 3x target) by using 2 cache line TLS
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// - Minimize instructions (6.2x → 2x target) by ultra-simple straight-line path
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// - Minimize branches (7.1x → 2x target) by predict-likely hints
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//
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// Design (ChatGPT consultation Phase 14 + Phase 14-B):
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// - Phase 14: C2/C3 (16B/32B) - Coverage: 1.71%
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// - Phase 14-B: +C4/C5 (64B/128B) - Coverage: 11.14% (6.5x improvement!)
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// - TLS structure: 2 cache lines (128B) for 4 magazines with adaptive slot counts
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// - Path: 2-3 instructions per alloc/free (pop/push from magazine)
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// - Fallback: If magazine empty/full → existing TinyHeapV2/FastCache path
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//
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// Cache locality strategy:
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// - All state in 1 cache line (64B): 2x mag[8] + 2x top + padding
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// - No pointer chasing, no indirect access
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// - Touches only 1 struct per alloc/free
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//
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// Instruction reduction strategy:
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// - Size→class: 1 compare (size <= 16 ? C1 : C2)
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// - Magazine access: Direct array index (no loops)
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// - Fallback: Return NULL immediately (caller handles)
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//
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// Branch prediction strategy:
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// - __builtin_expect(hit, 1) - expect 95%+ hit rate
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// - No nested branches in hot path
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#ifndef HAK_FRONT_TINY_ULTRA_HOT_H
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#define HAK_FRONT_TINY_ULTRA_HOT_H
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include "../box/tls_sll_box.h" // Phase 14-C: Borrowing design - refill from TLS SLL
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// Magazine capacity - adaptive sizing for cache locality (Phase 14-B)
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// Design principle: Balance capacity vs cache line usage
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//
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// Cache line 0 (64B): C2 + C3 magazines
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// C2 (16B): 4 slots × 8B ptr = 32B
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// C3 (32B): 4 slots × 8B ptr = 32B
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// Total: 64B (perfect fit!)
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//
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// Cache line 1 (64B): C4 + C5 magazines + counters
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// C4 (64B): 2 slots × 8B ptr = 16B
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// C5 (128B): 1 slot × 8B ptr = 8B
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// Counters: c1_top, c2_top, c4_top, c5_top = 4B
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// Padding: 36B
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// Total: 64B (fits!)
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//
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// Why fewer slots for larger classes?
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// - Maintain cache locality (2 cache lines = 128B total)
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// - Block size scales, so magazine memory scales proportionally
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// - Free path supplies blocks → even 1-2 slots maintain high hit rate
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//
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#ifndef ULTRA_HOT_MAG_CAP_C2
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#define ULTRA_HOT_MAG_CAP_C2 4 // C2 (16B) - 4 slots
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#endif
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#ifndef ULTRA_HOT_MAG_CAP_C3
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#define ULTRA_HOT_MAG_CAP_C3 4 // C3 (32B) - 4 slots
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#endif
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#ifndef ULTRA_HOT_MAG_CAP_C4
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#define ULTRA_HOT_MAG_CAP_C4 2 // C4 (64B) - 2 slots (NEW Phase 14-B)
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#endif
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#ifndef ULTRA_HOT_MAG_CAP_C5
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#define ULTRA_HOT_MAG_CAP_C5 1 // C5 (128B) - 1 slot (NEW Phase 14-B)
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#endif
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// TLS structure: 2 cache lines (128B) for hot path (Phase 14-B expanded)
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// Layout:
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// Cache line 0 (64B): C2_mag[4] (32B) + C3_mag[4] (32B)
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// Cache line 1 (64B): C4_mag[2] (16B) + C5_mag[1] (8B) + counters (4B) + pad (36B)
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// Cache line 2+: Statistics (cold path)
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// Total hot state: 128B (2 cache lines)
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typedef struct {
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// ===== Cache line 0 (64B): C2/C3 magazines =====
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void* c1_mag[ULTRA_HOT_MAG_CAP_C2]; // C2 (16B) - 4 slots, 32B
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void* c2_mag[ULTRA_HOT_MAG_CAP_C3]; // C3 (32B) - 4 slots, 32B
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// ===== Cache line 1 (64B): C4/C5 magazines + counters =====
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void* c4_mag[ULTRA_HOT_MAG_CAP_C4]; // C4 (64B) - 2 slots, 16B (NEW Phase 14-B)
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void* c5_mag[ULTRA_HOT_MAG_CAP_C5]; // C5 (128B) - 1 slot, 8B (NEW Phase 14-B)
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uint8_t c1_top; // C2 magazine top index
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uint8_t c2_top; // C3 magazine top index
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uint8_t c4_top; // C4 magazine top index (NEW Phase 14-B)
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uint8_t c5_top; // C5 magazine top index (NEW Phase 14-B)
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uint8_t pad[36]; // Padding to cache line boundary
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// ===== Statistics (cold path, cache line 2+) =====
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uint64_t c1_alloc_calls;
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uint64_t c1_hits;
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uint64_t c1_misses;
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uint64_t c2_alloc_calls;
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uint64_t c2_hits;
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uint64_t c2_misses;
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uint64_t c4_alloc_calls; // NEW Phase 14-B
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uint64_t c4_hits; // NEW Phase 14-B
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uint64_t c4_misses; // NEW Phase 14-B
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uint64_t c5_alloc_calls; // NEW Phase 14-B
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uint64_t c5_hits; // NEW Phase 14-B
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uint64_t c5_misses; // NEW Phase 14-B
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uint64_t c1_free_calls;
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uint64_t c1_free_hits;
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uint64_t c2_free_calls;
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uint64_t c2_free_hits;
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uint64_t c4_free_calls; // NEW Phase 14-B
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uint64_t c4_free_hits; // NEW Phase 14-B
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uint64_t c5_free_calls; // NEW Phase 14-B
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uint64_t c5_free_hits; // NEW Phase 14-B
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} __attribute__((aligned(64))) TinyUltraHot;
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// External TLS variable (defined in hakmem_tiny.c)
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extern __thread TinyUltraHot g_ultra_hot;
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// Enable flag (cached)
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// ENV: HAKMEM_TINY_ULTRA_HOT
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// - 0: Disable (use existing TinyHeapV2/FastCache)
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// - 1 (default): Enable ultra-fast C1/C2 path
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static inline int ultra_hot_enabled(void) {
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static int g_enable = -1;
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if (__builtin_expect(g_enable == -1, 0)) {
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const char* e = getenv("HAKMEM_TINY_ULTRA_HOT");
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if (e && *e) {
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g_enable = (*e != '0') ? 1 : 0;
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} else {
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g_enable = 1; // Default: ON (Phase 14 decision)
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}
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#if !HAKMEM_BUILD_RELEASE
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fprintf(stderr, "[UltraHot-INIT] ultra_hot_enabled() = %d\n", g_enable);
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fflush(stderr);
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#endif
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}
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return g_enable;
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}
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// Phase 14-C: Max size control (ENV: HAKMEM_TINY_ULTRA_HOT_MAX_SIZE)
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// Purpose: Control which size classes UltraHot handles
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// Default: 32 (C2/C3 only, safe for Random Mixed)
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// Fixed-size: 128 (C2-C5, optimal for fixed-size workloads)
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static inline size_t ultra_hot_max_size(void) {
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static size_t g_max_size = 0;
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if (__builtin_expect(g_max_size == 0, 0)) {
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const char* e = getenv("HAKMEM_TINY_ULTRA_HOT_MAX_SIZE");
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if (e && *e) {
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g_max_size = (size_t)atoi(e);
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} else {
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g_max_size = 32; // Default: C2/C3 only (Phase 14 behavior)
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}
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#if !HAKMEM_BUILD_RELEASE
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fprintf(stderr, "[UltraHot-INIT] ultra_hot_max_size() = %zu\n", g_max_size);
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fflush(stderr);
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#endif
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}
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return g_max_size;
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}
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// Ultra-fast alloc (C2/C3/C4/C5 - Phase 14-B expanded)
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// Contract:
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// - Input: size (must be 9-128B for C2-C5)
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// - Output: BASE pointer (not USER pointer!) or NULL
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// - Caller converts BASE → USER via HAK_RET_ALLOC
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//
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// Hot path (expect 95% hit rate):
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// 1. size → class (cascading compares)
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// 2. magazine pop (1 load + 1 decrement + 1 store)
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// 3. return BASE
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//
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// Cold path (5% miss rate):
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// - return NULL → caller uses existing TinyHeapV2/FastCache
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//
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// Performance target:
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// - L1 dcache: 2 cache lines load (128B) - all 4 mags
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// - Instructions: 5-7 instructions total per hit
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// - Branches: 2 branches (size check + mag empty check)
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static inline void* ultra_hot_alloc(size_t size) {
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// Fast path: size → class (cascading compares for branch prediction)
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// C2 = 16B (9-16), C3 = 32B (17-32), C4 = 64B (33-64), C5 = 128B (65-128)
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if (__builtin_expect(size <= 16, 1)) {
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// C2 path (16B)
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g_ultra_hot.c1_alloc_calls++;
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if (__builtin_expect(g_ultra_hot.c1_top > 0, 1)) {
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// Magazine hit! (5 instructions: load top, dec, load mag, store top, ret)
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g_ultra_hot.c1_hits++;
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uint8_t idx = --g_ultra_hot.c1_top;
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void* base = g_ultra_hot.c1_mag[idx];
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return base; // Return BASE (caller converts to USER)
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} else {
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// Magazine empty (cold path)
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g_ultra_hot.c1_misses++;
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return NULL;
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}
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} else if (__builtin_expect(size <= 32, 1)) {
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// C3 path (32B)
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g_ultra_hot.c2_alloc_calls++;
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if (__builtin_expect(g_ultra_hot.c2_top > 0, 1)) {
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// Magazine hit!
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g_ultra_hot.c2_hits++;
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uint8_t idx = --g_ultra_hot.c2_top;
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void* base = g_ultra_hot.c2_mag[idx];
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return base;
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} else {
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// Magazine empty
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g_ultra_hot.c2_misses++;
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return NULL;
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}
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} else if (__builtin_expect(size <= 64 && ultra_hot_max_size() >= 64, 0)) {
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// C4 path (64B) - Phase 14-C: ENV gated
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g_ultra_hot.c4_alloc_calls++;
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if (__builtin_expect(g_ultra_hot.c4_top > 0, 1)) {
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// Magazine hit!
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g_ultra_hot.c4_hits++;
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uint8_t idx = --g_ultra_hot.c4_top;
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void* base = g_ultra_hot.c4_mag[idx];
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return base;
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} else {
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// Magazine empty
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g_ultra_hot.c4_misses++;
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return NULL;
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}
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} else if (__builtin_expect(size <= 128 && ultra_hot_max_size() >= 128, 0)) {
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// C5 path (128B) - Phase 14-C: ENV gated
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g_ultra_hot.c5_alloc_calls++;
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if (__builtin_expect(g_ultra_hot.c5_top > 0, 1)) {
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// Magazine hit!
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g_ultra_hot.c5_hits++;
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uint8_t idx = --g_ultra_hot.c5_top;
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void* base = g_ultra_hot.c5_mag[idx];
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return base;
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} else {
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// Magazine empty
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g_ultra_hot.c5_misses++;
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return NULL;
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}
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} else {
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// Size out of range (C6+ or C0)
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return NULL;
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}
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}
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// Ultra-fast free (C2/C3/C4/C5 - Phase 14-B expanded)
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// Contract:
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// - Input: base (BASE pointer), class_idx
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// - Output: 1 if handled, 0 if magazine full (fallback to existing path)
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//
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// Hot path (expect 95% hit rate):
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// 1. class check (1 compare)
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// 2. magazine push (1 load top + 1 store mag + 1 increment + 1 store top)
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// 3. return 1
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//
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// Cold path (5% miss rate):
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// - return 0 → caller uses existing TinyHeapV2/TLS SLL path
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static inline int ultra_hot_free_by_class(void* base, int class_idx) {
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// Fast path: class → magazine
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// NOTE: HAKMEM class numbering: C0=8B, C1=?, C2=16B, C3=32B, C4=64B, C5=128B
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if (__builtin_expect(class_idx == 2, 1)) {
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// C2 path (16B)
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g_ultra_hot.c1_free_calls++;
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if (__builtin_expect(g_ultra_hot.c1_top < ULTRA_HOT_MAG_CAP_C2, 1)) {
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// Magazine has room! (5 instructions)
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g_ultra_hot.c1_free_hits++;
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uint8_t idx = g_ultra_hot.c1_top++;
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g_ultra_hot.c1_mag[idx] = base;
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return 1; // Success
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} else {
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// Magazine full → fallback
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return 0;
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}
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} else if (__builtin_expect(class_idx == 3, 1)) {
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// C3 path (32B)
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g_ultra_hot.c2_free_calls++;
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if (__builtin_expect(g_ultra_hot.c2_top < ULTRA_HOT_MAG_CAP_C3, 1)) {
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// Magazine has room!
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g_ultra_hot.c2_free_hits++;
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uint8_t idx = g_ultra_hot.c2_top++;
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g_ultra_hot.c2_mag[idx] = base;
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return 1;
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} else {
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// Magazine full
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return 0;
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}
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} else if (__builtin_expect(class_idx == 4, 0)) {
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// C4 path (64B) - NEW Phase 14-B
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g_ultra_hot.c4_free_calls++;
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if (__builtin_expect(g_ultra_hot.c4_top < ULTRA_HOT_MAG_CAP_C4, 1)) {
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// Magazine has room!
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g_ultra_hot.c4_free_hits++;
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uint8_t idx = g_ultra_hot.c4_top++;
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g_ultra_hot.c4_mag[idx] = base;
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return 1;
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} else {
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// Magazine full
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return 0;
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}
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} else if (__builtin_expect(class_idx == 5, 0)) {
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// C5 path (128B) - NEW Phase 14-B
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g_ultra_hot.c5_free_calls++;
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if (__builtin_expect(g_ultra_hot.c5_top < ULTRA_HOT_MAG_CAP_C5, 1)) {
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// Magazine has room!
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g_ultra_hot.c5_free_hits++;
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uint8_t idx = g_ultra_hot.c5_top++;
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g_ultra_hot.c5_mag[idx] = base;
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return 1;
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} else {
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// Magazine full
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return 0;
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}
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} else {
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// Class out of range (not C2-C5)
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return 0;
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}
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}
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// Magazine refill (called from existing front when it has spare blocks)
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// Strategy: TinyHeapV2 / FastCache can "donate" blocks to UltraHot
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// This is optional - UltraHot can work with just free path supply
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static inline void ultra_hot_try_refill_c1(void* base) {
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if (g_ultra_hot.c1_top < ULTRA_HOT_MAG_CAP_C2) {
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g_ultra_hot.c1_mag[g_ultra_hot.c1_top++] = base;
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}
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}
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static inline void ultra_hot_try_refill_c2(void* base) {
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if (g_ultra_hot.c2_top < ULTRA_HOT_MAG_CAP_C3) {
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g_ultra_hot.c2_mag[g_ultra_hot.c2_top++] = base;
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}
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}
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static inline void ultra_hot_try_refill_c4(void* base) {
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if (g_ultra_hot.c4_top < ULTRA_HOT_MAG_CAP_C4) {
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g_ultra_hot.c4_mag[g_ultra_hot.c4_top++] = base;
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}
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}
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static inline void ultra_hot_try_refill_c5(void* base) {
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if (g_ultra_hot.c5_top < ULTRA_HOT_MAG_CAP_C5) {
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g_ultra_hot.c5_mag[g_ultra_hot.c5_top++] = base;
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}
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}
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// Print statistics (called at program exit if HAKMEM_TINY_ULTRA_HOT_STATS=1)
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// Declaration only (implementation in hakmem_tiny.c for external linkage)
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void ultra_hot_print_stats(void);
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// Design notes:
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//
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// 1. Cache locality:
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// - All state fits in 2 cache lines (128B total)
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// - First line (64B): Both magazines (C1 + C2)
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// - Second line (64B): Counters + stats
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// - Expected L1 miss: ~1-2 per alloc/free (vs 30+ currently)
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//
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// 2. Instruction count:
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// - Alloc hit: ~7 instructions (size check + mag pop + return)
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// - Free hit: ~7 instructions (size check + mag push + return)
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// - Total: ~14 instructions per alloc/free pair (vs ~281M/500K = 562 currently)
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// - Reduction: 562 → 14 = 40x improvement
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//
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// 3. Branch prediction:
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// - Size check: __builtin_expect(size <= 16, 1) - predict C1 likely
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// - Magazine check: __builtin_expect(top > 0, 1) - predict hit likely
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// - Expected branch-miss: ~5% (vs 7.83% currently)
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//
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// 4. Integration with existing front:
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// - UltraHot is L0 (fastest)
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// - TinyHeapV2 is L1 (fast)
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// - FastCache is L2 (normal)
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// - If UltraHot misses → fallback to L1/L2
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// - Free path supplies both UltraHot and TinyHeapV2
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//
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// 5. Supply strategy:
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// - Free path: Always try UltraHot first, then TinyHeapV2, then TLS SLL
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// - Alloc path: Try UltraHot first, then TinyHeapV2, then FastCache
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// - No refill from backend (keeps UltraHot ultra-simple)
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//
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// 6. Expected performance:
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// - Current: 9.3M ops/s (Random Mixed 256B)
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// - Target: 40-60M ops/s (+330-545%)
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// - L1 miss: 2.9M → ~300K (-90%)
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// - Instructions: 281M → ~80M (-71%)
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// - Branches: 59M → ~15M (-75%)
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//
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// 7. Why C1/C2 only?
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// - C1 (16B) + C2 (32B) cover ~60% of tiny allocations
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// - Small magazine (4 slots) fits both in 1-2 cache lines
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// - Size check is trivial (size <= 16 / size <= 32)
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// - Larger classes (C3+) have different access patterns (less cache-sensitive)
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//
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// 8. Why not C0 (8B)?
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// - TinyHeapV2 showed -5% regression on C0
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// - 8B allocations are rare in real workloads
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// - Magazine overhead too high for 8B blocks
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//
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// 9. Comparison with TinyHeapV2:
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// - TinyHeapV2: 16 slots per class, covers C1-C3
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// - UltraHot: 4 slots per class, covers C1-C2 only
|
||
// - UltraHot is "ultra-hot subset" of TinyHeapV2
|
||
// - Trade magazine capacity for cache locality
|
||
//
|
||
// 10. ENV flags:
|
||
// - HAKMEM_TINY_ULTRA_HOT=0/1 - Enable/disable (default: 1)
|
||
// - HAKMEM_TINY_ULTRA_HOT_STATS=0/1 - Print stats at exit (default: 0)
|
||
|
||
// =============================================================================
|
||
// Phase 14-C: Borrowing Design - Refill from TLS SLL (正史から借りる)
|
||
// =============================================================================
|
||
// Design: UltraHot は「TLS SLL の手前にあるビュー」として動作
|
||
// - Free: 正史（TLS SLL）に戻す（横取りしない）
|
||
// - Alloc miss: TLS SLL から借りて magazine を refill
|
||
// - 学習層（Superslab/drain）が正しい在庫を追跡できる
|
||
//
|
||
// Call this after ultra_hot_alloc() miss to refill magazine from TLS SLL
|
||
static inline void ultra_hot_try_refill(int class_idx) {
|
||
if (!ultra_hot_enabled()) return;
|
||
if (class_idx < 2 || class_idx > 5) return; // C2-C5 のみ
|
||
|
||
// Refill magazine to full capacity (borrow from TLS SLL = 正史)
|
||
if (class_idx == 2) {
|
||
// C2 (16B): 4 slots magazine
|
||
while (g_ultra_hot.c1_top < ULTRA_HOT_MAG_CAP_C2) {
|
||
void* ptr = NULL;
|
||
if (!tls_sll_pop(class_idx, &ptr)) break; // TLS SLL から借りる
|
||
g_ultra_hot.c1_mag[g_ultra_hot.c1_top++] = ptr;
|
||
}
|
||
} else if (class_idx == 3) {
|
||
// C3 (32B): 4 slots magazine
|
||
while (g_ultra_hot.c2_top < ULTRA_HOT_MAG_CAP_C3) {
|
||
void* ptr = NULL;
|
||
if (!tls_sll_pop(class_idx, &ptr)) break;
|
||
g_ultra_hot.c2_mag[g_ultra_hot.c2_top++] = ptr;
|
||
}
|
||
} else if (class_idx == 4) {
|
||
// C4 (64B): 2 slots magazine
|
||
while (g_ultra_hot.c4_top < ULTRA_HOT_MAG_CAP_C4) {
|
||
void* ptr = NULL;
|
||
if (!tls_sll_pop(class_idx, &ptr)) break;
|
||
g_ultra_hot.c4_mag[g_ultra_hot.c4_top++] = ptr;
|
||
}
|
||
} else if (class_idx == 5) {
|
||
// C5 (128B): 1 slot magazine
|
||
while (g_ultra_hot.c5_top < ULTRA_HOT_MAG_CAP_C5) {
|
||
void* ptr = NULL;
|
||
if (!tls_sll_pop(class_idx, &ptr)) break;
|
||
g_ultra_hot.c5_mag[g_ultra_hot.c5_top++] = ptr;
|
||
}
|
||
}
|
||
}
|
||
|
||
#endif // HAK_FRONT_TINY_ULTRA_HOT_H
|