Moe Charm (CI)
d0b931b197
Phase 3 C1: TLS Prefetch Implementation - NEUTRAL Result (Research Box)
Step 1 & 2 Complete:
- Implemented: core/front/malloc_tiny_fast.h prefetch (lines 264-267, 331-334)
- LEGACY path prefetch of g_unified_cache[class_idx] to L1
- ENV gate: HAKMEM_TINY_PREFETCH=0/1 (default OFF)
- Conditional: only when prefetch enabled + route_kind == LEGACY
- A/B test (Mixed 10-run): PREFETCH=0 (39.33M) → =1 (39.20M) = -0.34% avg
- Median: +1.28% (within ±1.0% neutral range)
- Result: 🔬 NEUTRAL (research box, default OFF)
Decision: FREEZE as research box
- Average -0.34% suggests prefetch overhead > benefit
- Prefetch timing too late (after route_kind selection)
- TLS cache access is already fast (head/tail indices)
- Actual memory wait happens at slots[] array access (after prefetch)
Technical Learning:
- Prefetch effectiveness depends on L1 miss rate at access time
- Inserting prefetch after route selection may be too late
- Future approach: move prefetch earlier or use different target
Next: Phase 3 C2 (Metadata Cache Optimization, expected +5-10%)
🤖 Generated with Claude Code
Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
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