Add Page Box layer for C7 class optimization

- Implement tiny_page_box.c/h: per-thread page cache between UC and Shared Pool
- Integrate Page Box into Unified Cache refill path
- Remove legacy SuperSlab implementation (merged into smallmid)
- Add HAKMEM_TINY_PAGE_BOX_CLASSES env var for selective class enabling
- Update bench_random_mixed.c with Page Box statistics

Current status: Implementation safe, no regressions.
Page Box ON/OFF shows minimal difference - pool strategy needs tuning.

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
This commit is contained in:
Moe Charm (CI)
2025-12-05 15:31:44 +09:00
parent 2b2b607957
commit 093f362231
16 changed files with 651 additions and 1347 deletions

View File

@ -34,6 +34,10 @@ extern _Atomic uint64_t g_sp_stage3_hits[TINY_NUM_CLASSES_SS];
extern int g_sp_stage_stats_enabled;
void sp_stage_stats_init(void);
// Per-class lock acquisition statisticsStage2/Stage3 の alloc_lock 観測用)
extern _Atomic uint64_t g_sp_stage2_lock_acquired_by_class[TINY_NUM_CLASSES_SS];
extern _Atomic uint64_t g_sp_stage3_lock_acquired_by_class[TINY_NUM_CLASSES_SS];
// Internal Helpers (Shared between acquire/release/pool)
void shared_pool_ensure_capacity_unlocked(uint32_t min_capacity);
SuperSlab* sp_internal_allocate_superslab(int class_idx);